Quantinuum H2

S. A. Moses, C. H. Baldwin, M. S. Allman et al. A Race Track Trapped-Ion Quantum Processor. Phys. Rev. X 13, 041052 (2023). arXiv:2305.03828 · its circuits: Quantinuum/quantinuum-hardware-h2-benchmark

The one real machine here: a race-track trap with one closed RF null and no junctions, four gate zones that gate and measure, four that only sort, auxiliary parking zones, and two broadcast conveyor regions of twenty wells each. This is a design reproduction: the machine in our language, and the circuits it published.

What this website takes from this paper

Rules R4d, R18 cite it as a source.
The race-track device and its conveyor: a bend is not a junction, and a few broadcast signals drive a conveyor's wells.
The default device's two-qubit, one-qubit and SPAM fidelities.
Global Doppler cooling by sheet beams, and the race-track pass of our compiler.

H2 in our language: one closed loop of 59 sites, no junction; zones with their capacity in qubits: dg (2), ug (2), aux (2), conveyor (1), load (1). Drawn the way the paper's Fig. 2d is: the four DG zones, the only ones that gate, prepare and measure, are the labelled discs of the bottom rail, and the four UG zones, used only for sorting, those of the top rail; the unlabelled discs between and beside them are auxiliary parking. Past them, each end of the loop is a conveyor region of twenty wells running round the bend from one rail to the other; the green disc is the load hole. The Studio draws y downward, so there the DG rail is the top one. ▶ watch a 32-qubit GHZ circuit of ours run on it in the Studio

The programme in the Studio is our compiler's, for a GHZ circuit of our own with as many two-qubit gates as the paper's, 31. The runtime the Studio shows for it, 1.41 ms, is not a time for H2: the paper states no duration for any primitive, so every primitive of this machine is given a placeholder of 1 µs, and 1.41 ms is those placeholders added up over its 674 instructions. It counts operations; it is not calibrated to H2 and cannot be compared with the 0.18 s a shot the paper reports for its GHZ circuit (Table I: 2% quantum operations, 64% transport, 34% cooling). Cooling is the other thing the programme leaves out. Its one cooling instruction is the trap-wide Doppler cool at the start; the resolved sideband cooling H2 applies in the DG zones before two-qubit gates is neither in it nor folded into any primitive. Our description of the machine has one cooling primitive, trap-wide, and no heating rate or n-bar limit for a gate (the paper states neither), so the compiler's cooling pass has nothing to schedule: R7 has no limit to enforce, and R7c (a programme with two-qubit gates must cool) is met by the opening cool.

The paper prints, for each circuit it ran, the number of two-qubit gates and the number of two-qubit gate rounds (at most four gates a round, one per gate zone; Table I). We took the same circuits from its published data, rewrote each of its gates exactly (checked against the artifact's own ideal outputs) and counted. A round count is a scheduling measure, not a time: the paper publishes no primitive durations.

circuit	circuits	2Q gates: paper	ours	rounds: paper	dependency floor	layered with full rounds
GHZ	1	31	31 matches	14	8	9
MB, l=10	10	320	320 matches	80	80	80
QV	200	310	273–317 (median 296) matches	128	69–80 (median 74)	83–95 (median 90)
RCS	10	172	172 matches	56	43	46
QAOA, p=2	27	96	96 matches	66	27	34

QV: Table I lists one example circuit with 310 gates; the 200 published circuits average 296, as the text says. The dependency floor is the larger of the circuit's two-qubit depth and a quarter of its gates; the layered count is the paper's own layering with every round of four filled.

Our compiler on this machine

The published compiler compiles 248 of 248 of the paper's circuits on this machine, every rule passing and every certificate accepted by the proved checker. It runs H2 the way H2 runs: the whole loop shifts as one, neighbours swap in the two-ion zones, and up to four gates run per round, one per gate zone.

circuit	compiled, every rule passing	rounds: ours	the paper	dependency floor	transport cycles (median)
GHZ	1 of 1	9 fewer	14	8 reached by 0 of 1	642
MB, l=10	10 of 10	80	80	80 reached by 10 of 10	8,428
QV	200 of 200	69–80 (median 74) fewer	128	69–80 (median 74) reached by 200 of 200	2,983
RCS	10 of 10	43 fewer	56	43 reached by 10 of 10	4,506
QAOA, p=2	27 of 27	27 fewer	66	27 reached by 27 of 27	2,375

Read the rounds with care. A round count measures how well the gates are packed, not how long the circuit takes: our model does not price transport, and our schedules spend thousands of transport cycles between rounds (the last column), where H2's own compiler minimises the total time, transport included. What the table shows is that, on the paper's machine and with its circuits, our schedules reach each circuit's dependency floor (no schedule with at most four gates a round can use fewer rounds), except GHZ, one round above it. The compiled programmes are not published: the circuits are not ours to redistribute.

How a paper is checked · all papers